Analog Devices ADSP-BF506F Hardware Reference Manual page 148

Overview
Table 6-2. Internal Flash Memory Signal Names (Cont'd)
Signal Name
V DDFLASH
V PP
V SS
The internal flash memory features an asymmetrical block architecture.
The internal flash memory has an array of 71 blocks, and is divided into
4M bit banks. There are 7 banks each containing 8 main blocks of 32K
words, and one parameter bank containing 8 parameter blocks of 4K
words and 7 main blocks of 32K words.
The multiple bank architecture allows dual operations. While program-
ming or erasing in one bank, read operations are possible in other banks.
Only one bank at a time is allowed to be in program or erase mode. It is
possible to perform burst reads that cross bank boundaries. The bank
architectures are summarized in
Table 6-3. Internal Flash Memory Bank Architecture
Number
Parameter bank
Bank 1
Bank 2
Bank 3
Bank 4
Bank 5
Bank 6
Bank 7
6-4
Function
Supply voltage for input/output buffers
Global program/erase protect
Ground
Table
Bank Size
4M bit
4M bit
4M bit
4M bit
4M bit
4M bit
4M bit
4M bit
ADSP-BF50x Blackfin Processor Hardware Reference
6-3.
Parameter Blocks
8 blocks of 4K word
-
-
-
-
-
-
-
Direction
Input
Input
Main Blocks
7 blocks of 32K word
8 blocks of 32K word
8 blocks of 32K word
8 blocks of 32K word
8 blocks of 32K word
8 blocks of 32K word
8 blocks of 32K word
8 blocks of 32K word