Universal Counter Registers; Can_Uccnf Register - Analog Devices ADSP-BF506F Hardware Reference Manual

CAN Register Definitions

Universal Counter Registers

Figure 17-57 through

CAN_UCCNF Register

Universal Counter Configuration Mode Register (CAN_UCCNF)
15 14 13 12 11 10
0xFFC0 2ACC
0
UCE (Universal Counter
Enable)
0 - Counter disabled
1 - Counter enabled
UCCT (Universal Counter
CAN Trigger)
0 - No trigger
1 - mailbox 4 reception reloads
counter in watchdog mode
mailbox 4 reception clears
counter in time stamp mode
no effect in other modes
UCRC (Universal Counter
Reload/Clear) - WO
0 - No action
1 - write 1 to reload counter in
watchdog mode
write 1 to clear counter in
all other modes
Figure 17-57. Universal Counter Configuration Mode Register
17-82
Figure 17-59
9 8 7
0 0 0 0 0 0 0 0
ADSP-BF50x Blackfin Processor Hardware Reference
show the universal counter registers.
6 5 4 3 2 1 0
0 0 0 0 0 0 0
Reset = 0x0000
UCCNF[3:0] (Universal Coun-
ter Configuration)
0x0 - Reserved
0x1 - Time stamp mode
0x2 - Watchdog mode
0x3 - Auto-transmit mode
0x4 - Reserved
0x5 - Reserved
0x6 - Count error frames
0x7 - Count overload frames
0x8 - Count arbitration losts
0x9 - Count aborted
transmissions
0xA - Count successful
transmissions
0xB - Count rejected receive
messages
0xC - Count receive message
losts
0xD - Count successful
receptions
0xE - Count stored receptions
0xF - Count valid messages