Analog Devices ADSP-BF506F Hardware Reference Manual page 322

DMA Registers
Handshake MDMA Initial Block Count Registers
(HMDMAx_BCINIT)
The
HMDMAx_BCINIT
transfers to do per edge of the
Handshake MDMA Initial Block Count Registers (HMDMAx_BCINIT)
15 14 13 12 11 10
0 0 0 0
Figure 7-19. Handshake MDMA Initial Block Count Registers
Handshake MDMA Current Block Count Registers
(HMDMAx_BCOUNT)
The
HMDMAx_BCOUNT
transfers remaining for the current edge. MDMA requests are generated if
this count is greater than 0.
Examples:
• 0000 = 0 transfers remaining
• FFFF = 65535 transfers remaining
The field is loaded with
BCOUNT
is expired (0). Also, if the
BCOUNT
written to 1,
BCOUNT
mented with each MDMA grant. It is cleared when
A
block done
bit in the
MBDI
until is 0. If
ECOUNT
since no DMA requests were generated or grants received.
7-86
register, shown in
DMARx
9 8 7 6 5 4
0 0 0 0 0 0 0 0
register, shown in
BCINIT
is loaded with
interrupt is generated when
register is set, the interrupt is suppressed
HMDMAx_CONTROL
is 0, no
BCINIT
ADSP-BF50x Blackfin Processor Hardware Reference
Figure 7-19, holds the number of
control signal.
3 2 1 0
Reset = 0x0000
0 0 0 0
BCINIT[15:0] (Initial Block
Count)
Figure 7-20, holds the number of
when
ECOUNT
bit in the
RBC HMDMAx_CONTROL
. The
BCINIT BCOUNT
decrements to 0. If the
BCOUNT
interrupt is generated,
block done
is greater than 0 and
register is
field is decre-
is disabled.
HMDMA