Analog Devices ADSP-BF506F Hardware Reference Manual page 42

Contents
RSI CE-ATA Control Register (RSI_CEATA_CONTROL) .. 21-74
RSI Data FIFO Register (RSI_FIFO) .................................. 21-75
RSI Exception Status Register (RSI_ESTAT) ........................ 21-75
RSI Exception Mask Register (RSI_EMASK) ....................... 21-77
RSI Configuration Register (RSI_CONFIG) ....................... 21-78
RSI Read Wait Enable Register (RSI_RD_WAIT_EN) ......... 21-80
RSI Peripheral ID Registers (RSI_PIDx) .............................. 21-81
ADC CONTROL MODULE (ACM)
Interface Overview ..................................................................... 22-3
Events ................................................................................... 22-6
Timers .................................................................................. 22-6
External Triggers ................................................................... 22-7
Event Register Pairs ............................................................... 22-9
Event Comparators .............................................................. 22-9
Timing Generation Unit ....................................................... 22-9
Interrupts ........................................................................... 22-10
Description of Operation .......................................................... 22-10
ADC Power Down .............................................................. 22-11
Single-Shot Sequencing Mode Emulation ............................ 22-11
Continuous Sequencing Mode Emulation ........................... 22-12
Functional Description ............................................................. 22-15
ADC Sampling Latency ....................................................... 22-18
xlii ADSP-BF50x Blackfin Processor Hardware Reference