Overview
induction motor (ACIM) or permanent magnet synchronous motor
(PMSM) control.
In addition, the PWM block contains functions that considerably simplify
the generation of the required PWM switching patterns for control of
electronically commutated motors (ECMs) or brushless dc motors
(BDCMs).
Programming the
special mode used for switched reluctance motors (SRMs).
shows a block diagram that represents the main functional blocks of the
PWM Controller.
The following six blocks control the generation of the six output PWM
signals (
PWM_AH
• Three-Phase PWM Timing Unit. As the core of the PWM
Controller, this block generates three pairs of complemented,
center-based PWM signals and
• Dead Time Control Unit. This block inserts emergency dead time
after the "ideal" PWM output pair, including crossover, is
generated.
• Output Control Unit. This block permits the redirection of the
outputs of the Three-Phase Timing Unit for each channel to the
high-side or the low-side output. In addition, the Output Control
Unit allows individual enabling/disabling of each of the six PWM
output signals.
• Gate Drive Unit. This block provides the correct polarity output
PWM signals, based on the state of the
PWM_CTRL
of the high-frequency chopping waveform and its subsequent mix-
ing with the PWM output signals.
14-2
bit of the
PWM_SRMODE
,
,
,
PWM_AL
PWM_BH
PWM_BL
register. The Gate Drive Unit also permits the generation
ADSP-BF50x Blackfin Processor Hardware Reference
register to 0 enables a
PWM_CTRL
,
, and
PWM_CH
PWM_CL
coordination.
PWM_SYNC
PWM_POLARITY
Figure 14-1
):
bit of the
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