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GPIO Mask Interrupt B Set Registers (PORTxIO_MASKB_SET)
For all bits, 1 - Set
Set Px15 Interrupt B
Enable
Set Px14 Interrupt B
Enable
Set Px13 Interrupt B
Enable
Set Px12 Interrupt B
Enable
Set Px11 Interrupt B
Enable
Set Px10 Interrupt B
Enable
Figure 9-26. GPIO Mask Interrupt B Set Registers
ADSP-BF50x Blackfin Processor Hardware Reference
15 14 13 12 11 10
9
8
0
0
0
0
0
0
0
0
General-Purpose Ports
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
Reset = 0x0000
Set Px0 Interrupt B
Enable
Set Px1 Interrupt B
Enable
Set Px2 Interrupt B
Enable
Set Px3 Interrupt B
Enable
Set Px4 Interrupt B
Enable
Set Px5 Interrupt B
Enable
Set Px6 Interrupt B
Enable
Set Px7 Interrupt B
Enable
Set Px8 Interrupt B
Enable
Set Px9 Interrupt B
Enable
9-37
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