Single Block Read Operation - Analog Devices ADSP-BF506F Hardware Reference Manual

enable the data path state machine and to allow the DMA control-
ler to access the transmit FIFO. All other fields of the
RSI_DATA_CONTROL
12.Wait for the card to respond with the CRC token by waiting for
the
DAT_BLK_END
if the
RSI_DATA_LGTH
13.Clear the
register. Also clear the
register, if applicable.

Single Block Read Operation

Block read operations typically consist of 512 bytes of data per block.
If the card is found to support other block lengths or the default block
length as specified in the CID register is not 512, the block length of the
RSI must be configured accordingly. The block length of the card and the
block length of the RSI must be configured for the same block size at all
times. The block length of the RSI is configured via the
field of the
RSI_DATA_CONTROL

It is important to pay attention as to when the data path state
machine is enabled and when data is read from the receive FIFO
for data transfers from the card to the RSI. Read transactions can
occur on the
mand being received. It is therefore advisable to enable the data
path state machine, and DMA controller if being used, either:
• Prior to issuing a command that involves a data read packet
• Immediately after the command has been issued but prior to pend-
ing on the
ADSP-BF50x Blackfin Processor Hardware Reference
register should be zero.
flag to be set.
register was set to 512 bytes in step 5.
and
DAT_BLK_END DAT_END
DMA_DONE
register.
signals prior to the response of the com-
RSI_DATAx
flag
CMD_RESP_END
Removable Storage Interface
will also be set at this point
DAT_END
flags via the
bit of the
DMAx_IRQ_STATUS
RSI_STATUSCL
DATA_BLK_LGTH
21-39