Static Channel Prioritization - Analog Devices ADSP-BF506F Hardware Reference Manual

Static Channel Prioritization

The default DMA channel priority and mapping shown in
be changed by altering the 4-bit PMAP field in the
registers for the peripheral DMA channels.
Table 7-7. Priority and Default Mapping of Peripheral to DMA
DMA Channel PMAP Default Value Peripheral Mapped by Default
Priority
Highest DMA 0
DMA 1
DMA 2
DMA 3
DMA 4
DMA 5
DMA 6
DMA 7
DMA 8
DMA 9
DMA 10
DMA 11
MDMA D0
MDMA S0
MDMA D1
Lowest MDMA S1
ADSP-BF50x Blackfin Processor Hardware Reference
0x0 PPI receive or transmit
0x1 RSI receive or transmit
0x2 SPORT0 receive
0x3 SPORT0 transmit
0x4 SPORT1 receive
0x5 SPORT1 transmit
0x6 SPI0 receive or transmit
0x7 SPI1 receive or transmit
0x8 UART0 receive
0x9 UART0 transmit
0xA UART1 receive
0xB UART1 transmit
None Mem DMA has no peripheral mapping.
None Mem DMA has no peripheral mapping.
None Mem DMA has no peripheral mapping.
None Mem DMA has no peripheral mapping.
Direct Memory Access
Table 7-7
DMAx_PERIPHERAL_MAP
can
7-105