Analog Devices ADSP-BF506F Hardware Reference Manual page 454

Modes of Operation
SCLK
TMR PIN, PULSE_HI = 0
TMR PIN, PULSE_HI = 1
TIMER_COUNTER
X
X
TIMER_PERIOD BUFFER
X
TIMER_WIDTH BUFFER
TIMER_PERIOD
X
TIMER_WIDTH
X
TIMIL
TOVF_ERR
TIMEN
STARTS
COUNTING
NOTE: FOR SIMPLICITY, THE SYNCHRONIZATION DELAY BETWEEN TMR PIN EDGES AND BUFFER
REGISTER UPDATES IS NOT SHOWN.
Figure 10-13. Example Timing for Period Overflow Followed by Period
Capture (
WDTH_CAP
10-30
0xFFFF
1 2 3
FFFC
0
0
2 2
0
0
0
0
0
mode,
PERIOD_CNT
ADSP-BF50x Blackfin Processor Hardware Reference
0xFFFF 0xFFFF 0xFFFF
0 1
FFFD FFFE FFFF
ERROR
REPORT
= 1)
2 3 4 5
4
4
2
MEASUREMENT
REPORT