Sport Multichannel Transmit Selection (Sport_Mtcsn) Registers - Analog Devices ADSP-BF506F Hardware Reference Manual

SPORT Registers
SPORT Multichannel Receive Select Registers (SPORT_MRCSn)
For all bits, 0 - Channel disabled, 1 - Channel
enabled, so SPORT selects that word from multi-
ple word block of data.
31
31
MRCS0
0 0 0 0 0 0 0
63
31
MRCS1
0 0 0 0 0 0 0
95
31
0 0 0 0 0 0 0
MRCS2
127
31
MRCS3 0 0 0 0 0 0 0
Figure 19-41. SPORT Multichannel Receive Select Registers
SPORT Multichannel Transmit Selection
(SPORT_MTCSn) Registers
The
SPORT_MTCSn
disable individual channels. They specify the active transmit channels.
There are four registers, each with 32 bits, corresponding to the 128 chan-
nels. Setting a bit enables that channel so that the SPORT selects that
word for transmit from the multiple word block of data. For example, set-
ting bit 0 selects word 0, setting bit 12 selects word 12, and so on.
Setting a particular bit in a
transmit the word in that channel's position of the datastream. When the
secondary transmit side is enabled by the
word on the enabled channel. Clearing the bit in the
19-68
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
registers (shown in
SPORT_MTCSn
ADSP-BF50x Blackfin Processor Hardware Reference
0 Channel number
0
Bit number in register
0 0 0 0 0 0 0 0 0 0
Reset = 0x0000 0000
Channel number
32
0
Bit number in register
Reset = 0x0000 0000
0 0 0 0 0 0 0 0 0 0
Channel number
64
0 Bit number in register
Reset = 0x0000 0000
0 0 0 0 0 0 0 0 0 0
Channel number
96
0
Bit number in register
0 0 0 0 0 0 0 0 0 0
Reset = 0x0000 0000
Figure 19-42) are used to enable and
register causes the SPORT to
bit, both sides transmit a
TXSE
register
SPORT_MTCSn