Analog Devices ADSP-BF506F Hardware Reference Manual page 44

Contents
ANALOG/DIGITAL CONVERTER (ADC)
ADC Architecture ....................................................................... 23-1
Maximum ADC Sampling Rate ................................................... 23-4
Interfacing the ADC With the ACM and the SPORT ............ 23-4
Interfacing the ADC With the SPORT and With TMR Pins .. 23-6
SYSTEM RESET AND BOOTING
Overview .................................................................................... 24-1
Reset and Power-up ................................................................... 24-3
Hardware Reset ..................................................................... 24-5
Software Resets ..................................................................... 24-5
Servicing Reset Interrupts ...................................................... 24-8
Basic Booting Process .................................................................. 24-9
Block Headers ..................................................................... 24-11
Block Code .................................................................... 24-13
DMA Code Field ........................................................ 24-13
Block Flags Field ......................................................... 24-15
Header Checksum Field .............................................. 24-16
Header Sign Field ....................................................... 24-17
Target Address ................................................................ 24-17
Byte Count ..................................................................... 24-18
Argument ....................................................................... 24-18
Boot Host Wait (HWAIT) Feedback Strobe ......................... 24-19
Using HWAIT as Reset Indicator .................................... 24-20
xliv ADSP-BF50x Blackfin Processor Hardware Reference