Programming Model
Y
PROGRAM
Y_COUNT AND
Y_MODIFY
Enable necessary PPI pins through
PORT_MUX and PORT_FER registers
GP?
N
PROGRAM
PPI_FRAME
PROGRAM
PPI_COUNT
WRITE DMA_CONFIG TO ENABLE DMA
WRITE PPI_CONTROL TO ENABLE PPI
INTERNAL FS?
N
END
Figure 20-12. PPI Flow Diagram
20-24
START
2D DMA?
N
Y
FS?
N
EXTERNAL
TRIGGER?
N
Y
WRITE TIMER_ENABLE TO ENABLE TIMERS
ADSP-BF50x Blackfin Processor Hardware Reference
Y
PROGRAM
PPI_DELAY
Y
INTERNAL FS?
N
Y
PROGRAM TIMER(S)
LINKED WITH FS
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