Analog Devices ADSP-BF506F Hardware Reference Manual page 305

The fields of the
and operating modes.
•
FLOW[2:0]
transfer to follow the present one. The flow options are:
0x0 - stop. When the current work unit completes, the DMA chan-
nel stops automatically, after signaling an interrupt (if selected).
The
DMA_RUN
from 1 to 0, while the
unchanged. In this state, the channel is paused. Peripheral
interrupts are still filtered out by the DMA unit. The channel may
be restarted simply by another write to the
specifying the next work unit, in which the
0x1 - autobuffer mode. In this mode, no descriptors in memory are
used. Instead, DMA is performed in a continuous circular buffer
fashion based on user-programmed DMA MMR settings. Upon
completion of the work unit, the parameter registers are reloaded
into the current registers, and DMA resumes immediately with
zero overhead. Autobuffer mode is stopped by a user write of 0 to
the
DMAEN
0x4 - descriptor array mode. This mode fetches a descriptor from
memory that does not include the
the descriptor does not contain a next descriptor pointer entry, the
DMA engine defaults to using the
step through descriptors, thus allowing a group of descriptors to
follow one another in memory like an array.
0x6 - descriptor list (small model) mode. This mode fetches a
descriptor from memory that includes
fore, the high 16 bits of the next descriptor pointer field are taken
from the upper 16 bits of the
confining all descriptors to a specific 64K page in memory.
ADSP-BF50x Blackfin Processor Hardware Reference
register are used to set up DMA parameters
DMAx_CONFIG
(next operation). This field specifies the type of DMA
status bit in the
DMAEN
bit in the
DMAx_CONFIG
Direct Memory Access
DMAx_IRQ_STATUS
bit in the
DMAx_CONFIG
DMAx_CONFIG
DMAEN
register.
or
NDPH NDPL
DMAx_CURR_DESC_PTR
, but not
NDPL
DMAx_NEXT_DESC_PTR
register changes
register is
register
bit is set to 1.
elements. Because
register to
. There-
NDPH
register, thus
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