Analog Devices ADSP-BF506F Hardware Reference Manual page 801

Listing 17-4. CAN Transfers and Interrupts
CAN_SetupIRQs_and_Transfer:
P0.H = HI(CAN_MBIM1);
P0.L = LO(CAN_MBIM1);
R0 = 0;
BITSET(R0, BITPOS(MBIM8));
BITSET(R0, BITPOS(MBIM9));
W[P0] = R0;
SSYNC;
/* Leave CAN Configuration Mode (Clear CCR) */
P0.L = LO(CAN_CONTROL);
R0 = W[P0](Z);
BITCLR(R0, BITPOS(CCR));
W[P0] = R0;
P0.L = LO(CAN_STATUS);
/* Wait for CAN Configuration Acknowledge (CCA) */
WAIT_FOR_CCA_TO_CLEAR:
R1 = W[P0](Z);
CC = BITTST (R1, BITPOS(CCA));
IF CC JUMP WAIT_FOR_CCA_TO_CLEAR;
P0.L = LO(CAN_TRS1);
R0 = TRS8;
W[P0] = R0;
SSYNC;
Wait_Here_For_IRQs:
NOP;
NOP;
NOP;
JUMP Wait_Here_For_IRQs;
/* ===================================================
** CAN_TX_HANDLER
**
** ISR clears the interrupt request from MB8, writes
** new data to be sent, and requests to send again
ADSP-BF50x Blackfin Processor Hardware Reference
/* Enable Mailbox Interrupts */
/* for Mailboxes 8 and 9 */
/* Transmit Request MB08 */
/* Issue Transmit Request */
CAN Module
17-89