Analog Devices ADSP-BF506F Hardware Reference Manual page 989

Removable Storage Interface
Like the commands, all responses are sent on the signal.
RSI_CMD
A response always has a "0" start bit followed by a "0" transmission bit
to indicate the transfer is from card to host. Unlike the commands issued
by the host, not all responses are protected by a CRC7 checksum. Refer
to the appropriate specification for full details on the response formats and
whether they are protected by a CRC7 checksum.
When a short response is received, the response is broken down by the RSI
and the 32-bit field containing bits 39:8 of the 48-bit response is stored to
, where bit 39 of the response corresponds to bit 31 of
RSI_RESPONSE0
and bit 8 of the response to bit 0 of . Bits
RSI_RESPONSE0 RSI_RESPONSE0
45:40 of the response are stored to the field of the
RESP_CMD RSI_RESP_CMD
register.
For a long response, bits 127:1 of the response are stored in
, where bit 31 of contains the most
RSI_RESPONE0–3 RSI_RESPONSE0
significant bit (bit 127) of the response and bit 0 of
RSI_RESPONSE3
contains bit 1 of the response. Bit 31 of is always zero.
RSI_RESPONSE3
Figure 21-3 shows the command path state machine. In order for the state
machine to be active, the RSI must be enabled via . Disabling
RSI_CLK_EN
the clocks to the RSI will result in the state machine returning to the
IDLE state. The command path state machine is responsible for setting
and clearing a number of status flags within the register (see
RSI_STATUS
"RSI Status Register (RSI_STATUS)" on page 21-65).
ADSP-BF50x Blackfin Processor Hardware Reference 21-17