Analog Devices ADSP-BF506F Hardware Reference Manual page 24

Contents
PWM Switching Dead Time (PWM_DT) Register ............... 14-12
PWM Operating Mode (PWM_CTRL and PWM_STAT)
Registers .......................................................................... 14-13
PWM Duty Cycle
(PWM_CHA, PWM_CHB, and PWM_CHC) Registers ... 14-14
Special Consideration for PWM Operation in
Over-Modulation ............................................................. 14-20
Three-Phase PWM Timing Unit Operation ......................... 14-22
Effective PWM Accuracy ..................................................... 14-24
Switched Reluctance Mode .................................................. 14-25
Output Control Unit .......................................................... 14-25
Crossover Feature ........................................................... 14-25
Mode Bits (POLARITY and SRMODE) ......................... 14-26
Output Enable Function ................................................. 14-26
Brushless DC Motor (Electronically Commutated Motor)
Control ....................................................................... 14-27
Gate Drive Unit .................................................................. 14-29
High-Frequency Chopping ............................................. 14-29
PWM Polarity Control ................................................... 14-30
Output Control Feature Precedence ..................................... 14-31
Switched Reluctance (SR) Mode .......................................... 14-31
PWM Sync Operation ......................................................... 14-34
Internal PWM SYNC Generation ................................... 14-35
External PWM SYNC Generation ................................... 14-35
PWM Shutdown and Interrupt Control Unit ....................... 14-36
xxiv ADSP-BF50x Blackfin Processor Hardware Reference