Effective Pwm Accuracy - Analog Devices ADSP-BF506F Hardware Reference Manual

Functional Description

Effective PWM Accuracy

The PWM Controller has 16-bit resolution, but accuracy depends on the
PWM period. In single-update mode, the same values of
, and
PWM_CHB PWM_CHC
period. As a result, the effective accuracy of the PWM generation process

is 2 t (20 ns for a 100 MHz f
SCLK
cycle registers by 1 changes the resultant on-time of the associated PWM
signals by t
SCLK
ble-update mode, improved accuracy is possible since different values of
the duty cycles registers are used to specify the on-times in both the first
half and second half of the PWM period. As a result, it is possible to
adjust the on-time over the entire period in increments of t
responds to an effective PWM accuracy of t
(10 ns for a 100 MHz f
frequency at a given PWM accuracy is shown in
= 100 MHz.
SCLK
Table 14-1. Minimum Achievable PWM Frequency versus
Bit Resolution for SCLK = 100 MHz
Resolution (bits)
8
9
10
11
12
13
14
14-24
define the on-times in both half cycles of the PWM
in each half period (2
). The minimum achievable PWM switching
SCLK
PWM Frequency (kHz) in
Single-Update Mode
195.3
97.7
48.8
24.4
12.2
6.1
3.05
ADSP-BF50x Blackfin Processor Hardware Reference
). Incrementing one of the duty
SCLK

t for the full period). In dou-
SCLK
in double-update mode
SCLK
Table 14-1
PWM Frequency (kHz) in
Double-Update Mode
390.6
195.3
97.7
48.8
24.4
12.2
6.1
,
PWM_CHA
. This cor-
SCLK
for