Analog Devices ADSP-BF506F Hardware Reference Manual page 909

must be programmed into the frame sync divider register; setting
to 7 does not produce a frame sync pulse on each byte
SLEN
transmitted.
• Internal transmit frame sync select. (
whether the SPORT uses an internal
(if cleared).
• Transmit frame sync required select. (
whether the SPORT requires (if set) or does not require (if cleared)
a transmit frame sync for every data word.

The
TFSR
sync pulse is used to mark the beginning of each word or data
packet, and most systems need a frame sync to function properly.
• Data-Independent transmit frame sync select. (
selects whether the SPORT generates a data-independent
at selected interval) or a data-dependent
present in
( = 1). The
ITFS
selected.
The frame sync pulse marks the beginning of the data word. If
is set, the frame sync pulse is issued on time, whether the
DITFS
SPORT_TX
frame sync pulse is only generated if the
been loaded. If the receiver demands regular frame sync pulses,
should be set, and the processor should keep loading the
DITFS
SPORT_TX
late frame sync pulses,
SPORT from transmitting old data twice or transmitting garbled
data if the processor is late in loading the
• Low transmit frame sync select. (
low
TFS
ADSP-BF50x Blackfin Processor Hardware Reference
bit is normally set during SPORT configuration. A frame
) for the case of internal frame sync select
SPORT_TX
bit is ignored when external frame syncs are
DITFS
register has been loaded or not; if
register on time. If the receiver can tolerate occasional
DITFS
(if set) or active high
SPORT Controller
). This bit selects
ITFS
(if set) or an external
TFS
). This bit selects
TFSR
(sync when data is
TFS
DITFS
SPORT_TX
should be cleared to prevent the
SPORT_TX
). This bit selects an active
LTFS
(if cleared).
TFS
TFS
). This bit
DITFS
(sync
TFS
is cleared, the
data register has
register.
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