Master Mode Receive - Analog Devices ADSP-BF506F Hardware Reference Manual

Functional Description
Table 16-3. Master Mode Transmit Setup Interaction (Cont'd)
TWI Controller Master
...
Interrupt: MCOMP – Master transfer com-
plete.

Master Mode Receive

Follow these programming steps for a single master mode receive:
1. Program
during the address phase of the transfer.
2. Program
should occur with each byte received (8-bits) or with each two
bytes received (16-bits).
3. Program
interrupt sources. For example, programming the value 0x0030
results in an interrupt output to the processor in the event that the
master transfer completes, and the master transfer has an error.
4. Program
master mode operation. As an example, programming the value
0x0205 enables master mode operation, generates a 7-bit address,
sets the direction to master-receive, uses standard mode timing,
and receives 8 data bytes before generating a Stop condition.

After the
device sends a NAK to indicate to the slave transmitter that the bus
should be released. This allows the master to send the STOP signal
to terminate the transfer.
16-14
. This defines the address transmitted
TWI_MASTER_ADDR
. Indicate if receive FIFO buffer interrupts
TWI_FIFO_CTL
. Enable bits associated with the desired
TWI_INT_MASK
. Ultimately this prepares and enables
TWI_MASTER_CTL
bit is decremented to zero, the TWI master
TWI_DCNT
ADSP-BF50x Blackfin Processor Hardware Reference
Processor
...
Acknowledge: Clear interrupt source bits.