Analog Devices ADSP-BF506F Hardware Reference Manual page 401

START
IS THE
GPIO ENABLED IN
PORTxIO_MASKA_D?
YES
IS THE GPIO SET
AS AN OUTPUT IN
PORTxIO_DIR?
YES
(OUTPUT)
IS THE GPIO
SET TO ONE?
YES
Figure 9-1. GPIO Interrupt Generation Flow for Interrupt Channel A
Similarly to the GPIOs themselves, the mask register can either be written
through the GPIO mask data registers (
be controlled by the mask A/mask B set, clear and toggle registers.
ADSP-BF50x Blackfin Processor Hardware Reference
NO
(INPUT)
(LEVEL SENSITIVE)
IS THE INPUT
AN ACTIVE LEVEL
AS DEFINED IN
PORTxIO_POLAR?
GENERATE INTERRUPT A
General-Purpose Ports
IS THE INPUT
DRIVER ENABLED IN
PORTxIO_INEN?
YES
IS THE GPIO
NO
EDGE-SENSITIVE
AS DEFINED IN
PORTxIO_EDGE?
YES
PORTxIO_MASKA
YES
(EDGE SENSITIVE)
IS EDGE
DETECTED
AS DEFINED IN
PORTxIO_POLAR &
PORTxIO_BOTH?
YES
, ) or
PORTxIO_MASKB
9-19