Functional Description - Analog Devices ADSP-BF506F Hardware Reference Manual

read to determine polarity, and whether switched reluctance (SR) mode
( bit) is enabled, and whether an external trip situation is prevent-
PWM_SR
ing the correct start-up of the PWM Controller. An active external trip
event must be resolved prior to PWM startup. The
then written to define the major operating mode and to enable the PWM
outputs and PWM sync pulse.
During the
PWM_SYNCINT
duty values are updated typically. The
updated for other system implementations requiring output crossover.
During an external trip event (if not disabled), the PWM outputs will be
turned off (that is, set to the opposite of the "on" polarity configured by
the
PWM_POLARITY
will continue to operate if already enabled. A
occur if unmasked, notifying the software of this event. To handle cases
where clock signal integrity is an issue, external trips will turn off the
PWM outputs, with or without clocks.

Functional Description

This section describes the function of the following PWM features:
• "Three-Phase PWM Timing Unit and Dead Time Control Unit"
on page 14-10
• "PWM Switching Frequency (PWM_TM) Register" on
page 14-10
• "PWM Switching Dead Time (PWM_DT) Register" on
page 14-12
• "PWM Operating Mode (PWM_CTRL and PWM_STAT) Regis-
ters" on page 14-13
ADSP-BF50x Blackfin Processor Hardware Reference
interrupt-driven control loop, only the
bit of the
PWM_CTRL
PWM Controller
PWM_CTRL
register may also be
PWM_SEG
register), and the PWM sync pulse
PWM_TRIPINT
register is
PWM_CHx
interrupt will
14-9