Analog Devices ADSP-BF506F Hardware Reference Manual page 6

Contents
DMA Access Bus (DAB), DMA Core Bus (DCB), DMA
External Bus (DEB) .............................................................. 3-7
DAB, DCB, and DEB Arbitration ....................................... 3-7
DAB Bus Agents (Masters) .................................................. 3-9
DAB, DCB, and DEB Performance ..................................... 3-9
External Access Bus (EAB) .................................................... 3-10
Arbitration of the External Bus .............................................. 3-10
DEB/EAB Performance ......................................................... 3-10
SYSTEM INTERRUPTS
Specific Information for the ADSP-BF50x ..................................... 4-1
Overview ...................................................................................... 4-1
Features .................................................................................. 4-2
Description of Operation .............................................................. 4-2
Events and Sequencing ............................................................ 4-2
System Peripheral Interrupts .................................................... 4-4
Programming Model ..................................................................... 4-7
System Interrupt Initialization ................................................. 4-8
System Interrupt Processing Summary ..................................... 4-8
System Interrupt Controller Registers .......................................... 4-10
System Interrupt Assignment (SIC_IAR) Register .................. 4-11
System Interrupt Mask (SIC_IMASK) Register ...................... 4-12
System Interrupt Status (SIC_ISR) Register ........................... 4-12
System Interrupt Wakeup-Enable (SIC_IWR) Register ........... 4-12
vi ADSP-BF50x Blackfin Processor Hardware Reference