Figure 24.10 Basic Bus Timing/3-State Access With One Wait State - Renesas H8S/2437 Hardware Manual

T 1 T 2 T w T 3
φ
A15 to A0
(Read)
D15 to D0
(Read)
,
(Write)
D15 to D0
(Write)
t t
t t
WTS WTH
WTS WTH

Figure 24.10 Basic Bus Timing/3-State Access with One Wait State

Rev. 1.00, 09/03, page 680 of 704