Figure 24.13 Multiplex Bus Timing/3-State Access With One Wait State - Renesas H8S/2437 Hardware Manual

T 1 T 2 T 3 T 4 T DOW T 5
, ,
(Read)
AD15 to AD0
(Read)
,
(Write)
AD15 to AD0
(Write)
t t
t t
WTS WTH
WTS WTH

Figure 24.13 Multiplex Bus Timing/3-State Access with One Wait State

Rev. 1.00, 09/03, page 684 of 704