Timer B2 Interrupt Generation Frequency Set Counter (Ictb2) - Renesas M16C/64C User Manual

M16C/64C Group
19.2.7

Timer B2 Interrupt Generation Frequency Set Counter (ICTB2)

Timer B2 Interrupt Generation Frequency Set Counter
b7
Use the MOV instruction to set the ICTB2 register.
If the INV01 bit in the INVC0 register is 1, set the ICTB2 register when the TB2S bit in the TABSR
register is set to 0 (timer B2 counter stopped). If the INV01 bit is 0 and the TB2S bit to 1 (timer B2
counter start), do not set the ICTB2 register when timer B2 underflows.
When bits INV01 to INV00 are 11b, the first interrupt is generated when timer B2 underflows n-1 times if
a setting value in the ICTB2 counter is n. Subsequent interrupts are generated every n times timer B2
underflows.
R01UH0092EJ0110 Rev.1.10
Jul 31, 2012
b0 Symbol
ICTB2
When a setting value is n, timer B2 interrupt is generated
every nth count timer B2 underflow meets the condition
selected by bits INV01 to INV00 in the INVC0 register.
No register bits. If necessary, set to 0
19. Three-Phase Motor Control Timer Function
Address
030Dh
Function
Reset Value
Undefined
Setting Range RW
1 to 15 WO
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