Open-Drain Control Register (Pnodr) (N = 2); Port H Realtime Input Data Register (Phrtidr) - Renesas H8SX/1500 Series Hardware Manual

8.1.6

Open-Drain Control Register (PnODR) (n = 2)

ODR is an 8-bit readable/writable register that selects the open-drain output function.
If a bit in ODR is set to 1, the pin corresponding to that bit in ODR functions as an NMOS open-
drain output. If a bit in ODR is cleared to 0, the pin corresponding to that bit in ODR functions as
a CMOS output.
The initial value of ODR is H'00.
Bit 7
Bit Name Pn7ODR
Initial Value 0
R/W R/W
Note: The lower four bits are valid and the upper four bits are reserved for port 2 open drain control register (P2ODR).
8.1.7

Port H Realtime Input Data Register (PHRTIDR)

PHRTIDR stores the status of port H using pin IRQ14 as a trigger. The detection method is
specified by the IRQ14SR and IRQ14SF bits in the IRQ sense control register H (ISCRH) and is
selected from a low level, a falling edge, a rising edge of pin, and both edges of pin IRQ14. For
details, see section 5.3.5, IRQ Sense Control Registers H and L (ISCRH and ISCRL).
Bit 7
Bit Name PHRTIDR7
Initial Value 0
R/W R
6 5
Pn6ODR Pn5ODR Pn4ODR
0 0
R/W R/W
6 5
PHRTIDR6 PHRTIDR5 PHRTIDR4
0 0
R R
4 3
Pn3ODR Pn2ODR
0 0
R/W R/W R/W
4 3
PHRTIDR3 PHRTIDR2
0 0
R R
Rev. 3.00 Mar. 14, 2006 Page 215 of 804
Section 8 I/O Ports
2 1 0
Pn1ODR Pn0ODR
0 0 0
R/W R/W
2 1 0
PHRTIDR1 PHRTIDR0
0 0 0
R R R
REJ09B0104-0300