Programming Model
3. Wait for the
register, and clear the status bit once detected via the
register.
4. Ensure that the device is not busy and no errors occurred by
verifying the response contained in
5. Configure the DMA channel assigned to the RSI controller. Write
DMAx_START_ADDR
written to the card. The
128, and the
should be set for DMA enable (a word size of 32-bits).
6. Once the DMA channel has been configured and enabled, write
the number of bytes to be transferred to the
register. This will be 512 bytes for a single block.
7. Write the appropriate timeout value for a write operation to the
RSI_DATA_TIMER
8. Write the destination start address to the
The address supplied must be aligned to a 512-byte boundary if
misaligned accesses are not enabled and the card is not a
high-capacity SD card or sector-addressable MMC card.
9. Write the
command path state machine to expect a short response by setting
CMD_RESP
10.Wait for the
register, and clear the status bit once detected via the
register.
11.Enable the data path state machine by writing to the
RSI_DATA_CONTROL
512-byte block.
21-38
indication within the
CMD_RESP_END
with the address of the first byte of data to be
DMAx_X_COUNT
DMAx_X_MODIFY
register.
command to
WRITE_BLOCK
and clearing
CMD_L_RESP
indication within the
CMD_RESP_END
register with
and
DATA_EN
ADSP-BF50x Blackfin Processor Hardware Reference
RSI_RESPONSE0
register should be set to
register to 4. The
DMAx_CONFIG
RSI_DATA_LGTH
RSI_ARGUMENT
RSI_COMMAND
. The response type is R1.
DATA_BLK_LGTH
should also be set to
DATA_DMA_EN
RSI_STATUS
RSI_STATUSCL
.
register
register.
, configuring the
RSI_STATUS
RSI_STATUSCL
set to 9 for a
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