Analog Devices ADSP-BF506F Hardware Reference Manual page 1021

7. Write the destination start address to the
The supplied address must be aligned to a 512-byte boundary if
misaligned accesses are not enabled and the card is not a
high-capacity SD card or a sector-addressable MMC card.
8. Enable the data path state machine by writing to the
RSI_DATA_CONTROL
512-byte block.
the data path state machine and indicate the transfer direction is
from card to controller. All other fields of the
register should be zero.
9. Write the
ister, configuring the command path state machine to expect a
short response by setting
response type is R1.
10.In order to meet some timing restrictions related to block read
operations, it is advisable to not wait for the
tion within the
on the next step. This is due to the card being able to send data
before a response can completed on the
immediately onto step 11 will ensure a receive FIFO overflow does
not occur.
11.Poll the
indicating the receive FIFO has data available, or the receive FIFO
is empty. As long as the receive FIFO is not empty, read data from
the
RSI_FIFO
12.Once the block has been read, wait for the
indicate that the data was received correctly and passed the CRC
check.
13.Clear the
ADSP-BF50x Blackfin Processor Hardware Reference
register with
and
DATA_EN
READ_MULTIPLE_BLOCK
CMD_RESP
RSI_STATUS
bit or the
RX_FIFO_RDY
register until 512 bytes have been read.
flag via
DAT_BLK_END
Removable Storage Interface
RSI_ARGUMENT
DATA_BLK_LGTH
should also be set to enable
DATA_DIR
command to the
and clearing
CMD_RESP_END
register but instead move immediately
RSI_CMD
bit of
RX_DAT_ZERO
DAT_BLK_END
.
RSI_STATUSCL
register.
set to 9 for a
RSI_DATA_CONTROL
reg-
RSI_COMMAND
. The
CMD_L_RESP
indica-
signal, moving
RSI_STATUS
flag to
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