Rsi Command Path Crc; Rsi Data - Analog Devices ADSP-BF506F Hardware Reference Manual

RSI Command Path CRC

The command CRC generator of the RSI calculates the 7-bit CRC check-
sum for all 40 bits preceding the CRC code for both 48-bit commands
and 48-bit responses. This includes the start bit, transmitter bit, com-
mand index, and command argument (or card status). The 7-bit CRC
checksum is calculated for the first 120 bits of the register contents field
for the long response format. Note that the start bit, transmitter bit, and
the six check bits are not used in the CRC calculation for the long
response. The command and response CRC checksum is a 7-bit value that
is calculated as follows:
CRC[6:0]
with:
and for a short response:
M(x)
or for a long response:
M(x)

RSI Data

Data transfers both to and from the RSI take place over the RSI data bus
signals
RSI_DATA7–0
field of the
BUS_MODE
ADSP-BF50x Blackfin Processor Hardware Reference
=
Remainder
=
G(x)

= +
x (start bit)
39

= +
x (start bit)
19
. The RSI data bus width is configured via the
RSI_CLK_CONTROL
Removable Storage Interface

x M(x)
1
-------------------- -
G(x)
+ +
x x 1
7 3

+
... x (last bit before CRC)
0

+
... x (last bit before CRC)
0
register (see "RSI Clock Control
21-23