Output Data Registers H, L (Podrh, Podrl) - Renesas H8S Series Hardware Manual

12.3.2

Output Data Registers H, L (PODRH, PODRL)

PODRH and PODRL are 8-bit readable/writable registers that store output data for use in pulse
output. A bit that has been set for pulse output by NDER is read-only and cannot be modified.
PODRH
Bit Bit Name
7 POD15
6 POD14
5 POD13
4 POD12
3 POD11
2 POD10
1 POD9
0 POD8
PODRL
Bit Bit Name
7 POD15
6 POD14
5 POD13
4 POD12
3 POD11
2 POD10
1 POD9
0 POD8
Initial Value R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
Initial Value R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
Section 12 Programmable Pulse Generator (PPG)
Description
Output Data Register 8 to 15
For bits that have been set to pulse output by
NDERH, the output trigger transfers NDRH values
to this register during PPG operation. While
NDERH is set to 1, the CPU cannot write to this
register. While NDERH is cleared, the initial output
value of the pulse can be set.
Description
Output Data Register 0 to 7
For bits which have been set to pulse output by
NDERL, the output trigger transfers NDRL values
to this register during PPG operation. While
NDERL is set to 1, the CPU cannot write to this
register. While NDERL is cleared, the initial output
value of the pulse can be set.
Rev. 6.00 Mar 15, 2006 page 285 of 570
REJ09B0211-0600