Output Data Registers H, L (Podrh, Podrl) - Renesas H8S/2368 Series Hardware Manual

11.3.2

Output Data Registers H, L (PODRH, PODRL)

PODRH and PODRL store output data for use in pulse output. A bit that has been set for pulse
output by NDER is read-only and cannot be modified.
• PODRH
Bit Bit Name
7 POD15
6 POD14
5 POD13
4 POD12
3 POD11
2 POD10
1 POD9
0 POD8
• PODRL
Bit Bit Name
7 POD7
6 POD6
5 POD5
4 POD4
3 POD3
2 POD2
1 POD1
0 POD0
Initial Value R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
Initial Value R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
Description
Output Data Register 15 to 8
For bits which have been set to pulse output by
NDERH, the output trigger transfers NDRH values
to this register during PPG operation. While
NDERH is set to 1, the CPU cannot write to this
register. While NDERH is cleared, the initial output
value of the pulse can be set.
Description
Output Data Register 7 to 0
For bits which have been set to pulse output by
NDERL, the output trigger transfers NDRL values
to this register during PPG operation. While
NDERL is set to 1, the CPU cannot write to this
register. While NDERL is cleared, the initial output
value of the pulse can be set.
Rev. 2.00, 05/03, page 457 of 820