Samsung S3C6400X User Manual page 1044

S3C6400
RISC MICROPROCESSOR
TCNTB4 (TIMER4 COUNTER REGISTER)
Register Offset
TCNTB4
0x7F00603c
TCNTB4
Timer 4 Count Buffer
TCNTO4 (TIMER4 OBSERVATION REGISTER)
Register Offset
TCNTO4
0x7F006040
TCNTO4
Timer 4 Count Observation
TINT_CSTAT(INTERRUPT CONTROL AND STATUS REGISTER)
Register Offset
TINT_CSTAT
0x7F006044
TINT_CSTAT
Reserved
Timer 4 Interrupt Status
Timer 3 Interrupt Status
Timer 2 Interrupt Status
Timer 1 Interrupt Status
Timer 0 Interrupt Status
Timer 4 interrupt Enable
Timer 3 interrupt Enable
R/W
R/W Timer 4 Count Buffer Register
Bit R/W
[31:0] R/W Timer 4 Count Buffer Register
R/W
Timer 4 Count Observation Register
R
Bit R/W
[31:0] R Timer 4 Count Observation Register
R/W
Timer Interrupt Control and Status Register
R/W
Bit R/W
[31:10] R Reserved Bits
[9] R/W Timer 4 Interrupt Status Bit. Clears by writing '1'
on this bit.
[8] R/W Timer 3 Interrupt Status Bit. Clears by writing '1'
on this bit.
[7] R/W Timer 2 Interrupt Status Bit. Clears by writing '1'
on this bit.
[6] R/W Timer 1 Interrupt Status Bit. Clears by writing `1'
on this bit.
[5] R/W Timer 0 Interrupt Status Bit. Clears by writing '1'
on this bit.
[4] R/W Timer 4 Interrupt Enable.
1 – Enabled
[3] R/W Timer 3 Interrupt Enable.
1 – Enabled
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Pulse Width Modulation Timer
Description
Description
Description
Description
Description
Description
0 – Disabled
0 – Disabled
Reset Value
0x0000_0000
Initial State
0x00000000
Reset Value
0x0000_0000
Initial State
0x00000000
Reset Value
0x0000_0000
Initial State
0x00000
0x0
0x0
0x0
0x0
0x0
0x0
0x0
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