Time-Base Phase High-Resolution Register And Mirror Register (Tbphshr / Tbphshrm); Time-Base Counter Register (Tbctr); Time-Base Control Register (Tbctl); Time-Base Phase Register And Mirror Register (Tbphs / Tbphsm) Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

Registers
Table 7-29. Time-Base Phase Register and Mirror Register (TBPHS / TBPHSM) Field Descriptions
Bit Field
15-0 TBPHS
Figure 7-80. Time-Base Phase High-Resolution Register and Mirror Register (TBPHSHR /
15
7
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 7-30. Time-Base Phase High-Resolution Register and Mirror Register (TBPHSHR /
Bit Field
15-8 TBPHSHR
7-0 Reserved
15
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 7-31. Time-Base Counter Register (TBCTR) Field Descriptions
Bit Field
15-0 TBCTR
15 14
FREE, SOFT
R/W-0
7 6
HSPCLKDIV SWFSYNC
R/W-0,0,1 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
772
C28 Enhanced Pulse Width Modulator (ePWM) Module
Value Description
0000-FFFF These bits set time-base counter phase of the selected ePWM relative to the time-base
that is supplying the synchronization input signal.
• If TBCTL[PHSEN] = 0, then the synchronization event is ignored and the time-base
counter is not loaded with the phase.
• If TBCTL[PHSEN] = 1, then the time-base counter (TBCTR) will be loaded with the
phase (TBPHS) when a synchronization event occurs. The synchronization event can
be initiated by the input synchronization signal (EPWMxSYNCI) or by a software forced
synchronization.
TBPHSHRM) Field Descriptions
Value Description
00-FFh Time base phase high-resolution bits
Reserved
Figure 7-81. Time-Base Counter Register (TBCTR)
Value Description
0000-FFFF Reading these bits gives the current time-base counter value.
Writing to these bits sets the current time-base counter value. The update happens as
soon as the write occurs; the write is NOT synchronized to the time-base clock (TBCLK)
and the register is not shadowed.
Figure 7-82. Time-Base Control Register (TBCTL)
13 12
PHSDIR
R/W-0
5 4
SYNCOSEL
R/W-0
Copyright © 2012–2019, Texas Instruments Incorporated
TBPHSHRM)
TBPHSHR
R/W-0
Reserved
R-0
TBCTR
R/W-0
10
CLKDIV
R/W-0
3
PRDLD PHSEN
R/W-0 R/W-0
SPRUHE8E – October 2012 – Revised November 2019
9
HSPCLKDIV
R/W-0,0,1
2 1
CTRMODE
R/W-11
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