Erase/Program Flash - Texas Instruments Concerto F28M36 Series Technical Reference Manual

Flash Controller Memory Module

5.3.9 Erase/Program Flash

The F021 Flash ( F28M36x M3 Flash and C28x Flash) should be programmed, erased, and verified only
by using the F021 Flash API library. These functions are written, compiled and validated by Texas
Instruments. The flash module contains a flash state machine (FSM) to perform, program, and erase
operations. This section only provides a high-level description for these operations. Please refer to the
C2000 F021 Flash Application Programming Interface (API) Reference Guide, SPNU595, for more
information. Please note that Flash API functions must only be executed from RAM and not from flash.
A typical flow to program flash is:
Erase → Program → Verify
5.3.9.1 Erase
When the target flash is erased, it reads as all 1's. This state is called 'blank.' The erase function must be
executed before programming. The user should NOT skip erase on sectors that read as 'blank' because
these sectors may require additional erasing due to marginally erased bits columns. The FSM provides an
"Erase Sector" command to erase the target sector. The erase function erases the data and the ECC
together. These commands are implemented by the following Flash API function:
Fapi_issueAsyncCommandWithAddress();
The Flash API provides the following function to determine if the flash bank is 'blank':
Fapi_doBlankCheck();
5.3.9.2 Program
The FSM provides command to program the customer OTP area and flash program data area. This
command is also used to program ECC check bits.
This command is implemented by the following Flash API functions:
Fapi_issueProgrammingCommand();
The Program function provides the options to program data without ECC, data along with user provided
ECC data, data along with ECC calculated by API software, and to program ECC only.
5.3.9.3 Verify
After programming, the user must perform verify using API function Fapi_doVerify(). This function verifies
the flash contents against supplied data in normal read mode and also in read-margin modes. Read
margin modes 0 and 1 are used to test cells for marginality. Read margin 0 is used to test cells for
marginality of programmed cells. Read margin 1 is used to test cells for marginality of erased cells.
Application software is generally developed to enter read-margin mode during power-up and to perform a
full CRC check of the flash contents. In this way, a potential read mode failure can be identified prior to
data loss or gain causing a bit flip.
NOTE: The read-margin modes are intended for diagnostic capabilities. Flash content is guaranteed
for the lifetime specified in the datasheet.
Read margin modes should only be entered when executing from RAM. Banks must be powered up
before entering a read margin mode. When entering a read margin mode, or changing from one read
margin mode to the other, allow 1us delay before the first flash access to allow the flash banks to adjust to
the new mode.
Read margin modes 0/1 are enabled by setting the RM0/RM1 bits in the special read control register,
FSPRD. The recommended procedures to enter, change, and exit read margin mode are shown below.
To enter read-margin mode:
1. Start execution out of RAM.
2. Set the banks to remain powered up by writing 3 to bits 0:1 of the FBFALLBACK register.
3. Turn on read margin 0 or 1 by writing 1 or 2 to the FSPRD register.
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Internal Memory
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SPRUHE8E – October 2012 – Revised November 2019
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