Gpio Port G Direction (Gpedir) Register; Gpio Port G Direction (Gpgdir) Register; Gpio Port E Direction (Gpedir) Register Field Descriptions; Gpio Port G Direction (Gpgdir) Register Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

C28 General-Purpose Input/Output (GPIO)
4.2.7.34 GPIO Port E Direction (GPEDIR) Register
The GPIO Port E Direction (GPEDIR) registeris shown and described in the figure and table below.
31
15
7 6
GPIO135 GPIO134
R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 4-84. GPIO Port E Direction (GPEDIR) Register Field Descriptions
Bits Field
31-8 Reserved
7-0 GPIO135-GPIO128
(1)
This register is EALLOW protected.

4.2.7.35 GPIO Port G Direction (GPGDIR) Register

The GPIO Port G Direction (GPGDIR) register is shown and described in the figure and table below.
31
15
7 6
GPIO199 GPIO198
R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 4-85. GPIO Port G Direction (GPGDIR) Register Field Descriptions
Bits Field
31-8 Reserved
7-0 GPIO192-GPIO199
(1)
This register is EALLOW protected.
4.2.7.36 GPIO Port G Pullup Disable (GPGPUD) Register
The GPIO Port G Pullup Disable (GPGPUD) register is shown and described in the figure and table below.
444
General-Purpose Input/Output (GPIO)
Figure 4-75. GPIO Port G Direction (GPEDIR) Register
Reserved
Reserved
5 4
GPIO133 GPIO132
R/W-0 R/W-0
Value
Any writes to these bit(s) must always have a value of 0.
Controls direction of GPIO pin when GPIO mode is selected. Reading the register returns the
current value of the register setting
0 Configures the GPIO pin as an input. (default)
1 Configures the GPIO pin as an output
Figure 4-76. GPIO Port G Direction (GPGDIR) Register
Reserved
Reserved
5 4
GPIO197 GPIO196
R/W-0 R/W-0
Value
Any writes to these bit(s) must always have a value of 0.
Controls direction of GPIO pin when GPIO mode is selected. Reading the register returns the
current value of the register setting
0 Configures the GPIO pin as an input. (default)
1 Configures the GPIO pin as an output
Copyright © 2012–2019, Texas Instruments Incorporated
R-0
R-0
3 2
GPIO131 GPIO130
R/W-0 R/W-0
(1)
Description
R-0
R-0
3 2
GPIO195 GPIO194
R/W-0 R/W-0
(1)
Description
SPRUHE8E – October 2012 – Revised November 2019
www.ti.com
16
8
1 0
GPIO129 GPIO128
R/W-0 R/W-0
16
8
1 0
GPIO193 GPIO192
R/W-0 R/W-0
Submit Documentation Feedback