General Purpose Bus Operation; Epi General-Purpose Signal Connections - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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General-Purpose Signal

In this mode, half-word accesses are used. A0 is the LSB of the address and is equivalent to the system A1 address.

In this mode, word accesses are used. A0 is the LSB of the address and is equivalent to the system A2 address.

This signal is iRDY if the RDYEN bit in the EPIGPCFG register is set.

17.8.1 General Purpose Bus Operation

A basic access is one EPI clock for write cycles and two EPI clocks for read cycles. An additional EPI

clock can be inserted into a write cycle by setting the WR2CYC bit in the EPIGPCFG register. Note that

the RD2CYC bit must always be set in the EPIGPCFG register.

SPRUHE8E – October 2012 – Revised November 2019

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Table 17-9. EPI General-Purpose Signal Connections

General-Purpose Signal

General-Purpose Signal

External Peripheral Interface (EPI)

General-Purpose Mode

General-Purpose Signal

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