Event Filtering - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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ePWM Submodules

DCFCTL[INVERT]

DCFCTL[SRCSEL]

If the blanking logic is enabled, one of the digital compare events – DCAEVT1, DCAEVT2, DCBEVT1,

DCBEVT2 – is selected for filtering. The blanking window, which filters out all event occurrences on the

signal while it is active, will be aligned to either a CTR = PRD pulse or a CTR = 0 pulse (configured by the

DCFCTL[PULSESEL] bits). An offset value in TBCLK counts is programmed into the DCFOFFSET

starts. The duration of the blanking window, in number of TBCLK counts after the offset counter expires, is

written to the DCFWINDOW register by the application. During the blanking window, all events are

ignored. Before and after the blanking window ends, events can generate soc, sync, interrupt, and force

signals as before.

The diagram below illustrates several timing conditions for the offset and blanking window within an

ePWM period. Notice that if the blanking window crosses the CTR = 0 or CTR = PRD boundary, the next

window still starts at the same offset value after the CTR = 0 or CTR = PRD pulse.

C28 Enhanced Pulse Width Modulator (ePWM) Module

Figure 7-53. Event Filtering

DCFCTL[BLANKE, PULSESEL]

DCFOFFSET[OFFSET]

DCFWINDOW[WINDOW]

DCCAPCTL[CAPE, SHDWMODE]

DCFCTL[PULSESEL]

SPRUHE8E – October 2012 – Revised November 2019

DCCAP[15:0] Reg

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