Mcbsp Operation; Conceptual Block Diagram Of The Mcbsp - Texas Instruments Concerto F28M36 Series Technical Reference Manual

Overview
15.1.2.1 McBSP Generic Block Diagram
The McBSP consists of a data-flow path and a control path connected to external devices by six pins as
shown in Figure 15-1. The figure and the text in this section use generic pin names.
MXINT
To CPU
McBSP Transmit
Interrupt Select Logic
LSPCLK
CPU DMA Bus
McBSP Receive
Interrupt Select Logic
MRINT
To CPU
A Not available in all devices. See the device-specific data sheet

15.1.3 McBSP Operation

This section addresses the following topics:
• Data transfer process
• Companding (compressing and expanding) data
• Clocking and framing data
• Frame phases
• McBSP reception
• McBSP transmission
• Interrupts and DMA events generated by McBSPs
1076
C28 Multichannel Buffered Serial Port (McBSP)
Figure 15-1. Conceptual Block Diagram of the McBSP
TX
Interrupt
TX Interrupt Logic
RX
RX Interrupt Logic Interrupt
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Peripheral Write Bus
16
DXR2 Transmit Buffer
DXR1 Transmit Buffer
16
Compand Logic
XSR2 XSR1
RSR1
RSR2
16
Expand Logic
RBR2 Register RBR1 Register
16
DRR2 Receive Buffer
DRR1 Receive Buffer
16
Peripheral Read Bus
SPRUHE8E – October 2012 – Revised November 2019
CPU
16
MFSXx
16
MCLKXx
MDXx
MDRx
16
MCLKRx
MFSRx
16
16
CPU
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