Event-Trigger Selection Register (Etsel); Event-Trigger Selection Register (Etsel) Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

www.ti.com
7.4.9 Event-Trigger Submodule Registers
Figure 7-132 through
trigger submodule.
15 14
SOCBEN
R/W-0
7 6
Reserved INTSELCMP
R-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 7-84. Event-Trigger Selection Register (ETSEL) Field Descriptions
Bit Field
15 SOCBEN
14-12 SOCBSEL
11 SOCAEN
10-8 SOCASEL
7 Reserved
SPRUHE8E – October 2012 – Revised November 2019
Submit Documentation Feedback
Figure 7-140 and Table 7-84
Figure 7-132. Event-Trigger Selection Register (ETSEL)
12
SOCBSEL
R/W-0
5 4
SOCBSELCMP SOCASELCMP
R/W-0 R/W-0
Value Description
Enable the ADC Start of Conversion B (EPWMxSOCB) Pulse
0 Disable EPWMxSOCB.
1 Enable EPWMxSOCB pulse.
EPWMxSOCB Selection Options
These bits determine when a EPWMxSOCB pulse will be generated.
000 Enable DCBEVT1.soc event
001 Enable event time-base counter equal to zero. (TBCTR = 0x00)
010 Enable event time-base counter equal to period (TBCTR = TBPRD)
011 Enable event time-base counter equal to zero or period (TBCTR = 0x00 or TBCTR = TBPRD). This
mode is useful in up-down count mode.
100 Enable event time-base counter equal to CMPA when the timer is incrementing or CMPC when the
timer is incrementing
101 Enable event time-base counter equal to CMPA when the timer is decrementing or CMPC when the
timer is decrementing
110 Enable event: time-base counter equal to CMPB when the timer is incrementing or CMPD when the
timer is incrementing
111 Enable event: time-base counter equal to CMPB when the timer is decrementing or CMPD when
the timer is decrementing (*) Event selected is determined by SOCBSELCMP bit.
Enable the ADC Start of Conversion A (EPWMxSOCA) Pulse
0 Disable EPWMxSOCA.
1 Enable EPWMxSOCA pulse.
EPWMxSOCA Selection Options
These bits determine when a EPWMxSOCA pulse will be generated.
000 Enable DCAEVT1.soc event
001 Enable event time-base counter equal to zero. (TBCTR = 0x00)
010 Enable event time-base counter equal to period (TBCTR = TBPRD)
011 Enable event time-base counter equal to zero or period (TBCTR = 0x00 or TBCTR = TBPRD). This
mode is useful in up-down count mode.
100 Enable event time-base counter equal to CMPA when the timer is incrementing or CMPC when the
timer is incrementing
101 Enable event time-base counter equal to CMPA when the timer is decrementing or CMPC when the
timer is decrementing
110 Enable event: time-base counter equal to CMPB when the timer is incrementing or CMPD when the
timer is incrementing
111 Enable event: time-base counter equal to CMPB when the timer is decrementing or CMPD when
the timer is decrementing (*) Event selected is determined by SOCASELCMP bit.
0 Reserved
Copyright © 2012–2019, Texas Instruments Incorporated
through Table 7-92 describe the registers for the event-
11 10
SOCAEN
R/W-0
3 2
INTEN
R/W-0
C28 Enhanced Pulse Width Modulator (ePWM) Module
Registers
8
SOCASEL
R/W-0
0
INTSEL
R/W-0
817