Transmit Interrupt Generation; Transmit Interrupt Sources And Signals; Error Flags - Texas Instruments Concerto F28M36 Series Technical Reference Manual

McBSP Registers
McBSP Interrupt Flags
Interrupt
Signal
RINT RRDY
EOBR
RSYNCERR
NOTE: Since X/RINT, X/REVTA, and X/RXFFINT share the same CPU interrupt, it is recommended
that all applications use one of the above selections for interrupt generation. If multiple
interrupt enables are selected at the same time, there is a likelihood of interrupts being
masked or not recognized.
15.12.12.2 McBSP Transmit Interrupt Generation
McBSP module data transmit and error conditions generate two sets of interrupt signals. One set is used
for the CPU and the other set is for DMA.
EOBX condition
McBSP Interrupt
Interrupt
Signal
XINT
XSYNCERR

15.12.12.3 Error Flags

The McBSP has several error flags both on receive and transmit channel.
flags and their meaning.
Error Flags
RFULL
RSYNCERR
XSYNCERR
1182
C28 Multichannel Buffered Serial Port (McBSP)
Table 15-92. Receive Interrupt Sources and Signals (continued)
Interrupt Enables
in SPCR1
0
1
FSR 10
11
Figure 15-81. Transmit Interrupt Generation
00
XRDY
01
10
FSX detected
11
XSYNCERR
XINTM bits
Table 15-93. Transmit Interrupt Sources and Signals
Interrupt
Flags Enables in
SPCR2
XINTM Bits
XRDY 0
EOBX 1
FSX 10
11
Table 15-94. Error Flags
Function
Indicates DRR2/DRR1 are not read and RXR register is overwritten
Indicates unexpected frame-sync condition, current data reception will abort and restart. Use RINTM
bit 11 for interrupt generation on this condition.
Indicates unexpected frame-sync condition, current data transmission will abort and restart. Use
XINTM bit 11 for interrupt generation on this condition.
Copyright © 2012–2019, Texas Instruments Incorporated
Interrupt Enables Type of Interrupt
RINTENA Every word receive
RINTENA Every 16 channel
block boundary
RINTENA On every FSR
RINTENA Frame sync error
XINT
XINTENA
Interrupt Type of Interrupt
Enables
XINTENA Every word transmit
XINTENA Every 16-channel block boundary
XINTENA On every FSX
XINTENA Frame sync error
Table 15-94
SPRUHE8E – October 2012 – Revised November 2019
www.ti.com
Interrupt Line
MRINT
MXINT
Interrupt
Line
MXINT
explains the error
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