Control System: Lock Register (Clock); Control System: Lock Register (Clock) Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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10.3.12.3 Control System: Lock Register (CLOCK)

NOTE: This Analog Subsystem Control Register is EALLOW protected.
15
7
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 10-29. Control System: Lock Register (CLOCK) Field Descriptions
Bit Field
15-8 PSWD
7-2 Reserved
1 CCLKCTL
0 Reserved
SPRUHE8E – October 2012 – Revised November 2019
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Figure 10-43. Control System: Lock Register (CLOCK)
Reserved
R-0
Value Description
0-FFh Write protection password
The CCLKCTL protection bit can only be written if a proper password is written to PSWD
simultaneously.
The password is 1Bh.
0 Reserved
Control System: CLKCTL Register Write Disable.
This bit, if written simultaneously with the correct PSWD value, will enable write protection for the
CLKDIV bits in the CCLKCTL register.
Write protection can only be disabled by a system reset.
0 Reserved
Copyright © 2012–2019, Texas Instruments Incorporated
PSWD
R-0/W
2
Analog-to-Digital Converter (ADC)
8
1 0
CCLKCTL Reserved
R/W-0 R-0
Analog Subsystem
929