Gpio Port C Mux 1 (Gpcmux1) Register; Gpio Port C Mux 1 (Gpcmux1) Register Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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C28 General-Purpose Input/Output (GPIO)
Table 4-54. GPIO Port B MUX 2 (GPBMUX2) Register Field Descriptions (continued)
Bit
Field
7:6
GPIO51
5:4
GPIO50
3:2
GPIO49
1:0
GPIO48
4.2.7.5

GPIO Port C MUX 1 (GPCMUX1) Register

The GPIO Port C MUX 1 (GPCMUX1) register is shown and described in the figure and table below.
31
30
GPIO79
R/W-0
23
22
GPIO75
R/W-0
15
14
GPIO71
R/W-0
7
6
GPIO67
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 4-55. GPIO Port C MUX 1 (GPCMUX1) Register Field Descriptions
Bit
Field
31-30
GPIO79
410
General-Purpose Input/Output (GPIO)
Value
Description
Configure this pin as:
00
GPIO 51 - general purpose I/O 51 (default)
01
EQEP1B - eQEP1 input B (I)
10
Reserved
11
Reserved
Configure this pin as:
00
GPIO 50 - general purpose I/O 50 (default)
01
EQEP1A- eQEP1 input A (I)
10
Reserved
11
Reserved
Configure this pin as:
00
GPIO 49 - general purpose I/O 49 (default)
01
ECAP6 - eCAP6 (I/O)
10
Reserved
11
Reserved
Configure this pin as:
00
GPIO 48 - general purpose I/O 48 (default)
01
ECAP5 - eCAP5 (I/O)
10
Reserved
11
Reserved
Figure 4-46. GPIO Port C MUX 1 (GPCMUX1) Register
29
28
GPIO78
R/W-0
21
20
GPIO74
R/W-0
13
12
GPIO70
R/W-0
5
4
GPIO66
R/W-0
Value
Description
Configure this pin as:
00
GPIO 79 - general purpose I/O 79 GPIO (default)
01
Reserved
10
Reserved
11
Reserved
Copyright © 2012–2019, Texas Instruments Incorporated
27
26
GPIO77
R/W-0
19
18
GPIO73
R/W-0
11
10
GPIO69
R/W-0
3
2
GPIO65
R/W-0
SPRUHE8E – October 2012 – Revised November 2019
Submit Documentation Feedback
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25
24
GPIO76
R/W-0
17
16
GPIO72
R/W-0
9
8
GPIO68
R/W-0
1
0
GPIO64
R/W-0

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