Device Boot Modes
6.3
Device Boot Modes
This section explains the boot mode(s) supported on this device. As part of the master subsystem, M-Boot
ROM reads the boot mode GPIO on startup and boots the device accordingly.
mode GPIO configuration supported.
As will be explained in this chapter, C-Boot ROM also supports different boot modes which allow it to boot
from the control subsystem peripherals or boot-to-flash or boot-to-RAM. It is up to the master subsystem
application to start these boot mode(s) in C-Boot ROM using IPC commands.
Boot Mode #
0
Boot from Parallel GPIO
(2)
1
Boot to Master Subsystem RAM
(2)
Boot from Master Subsystem serial
2
(2)
peripherals (UART0/SSI0/I2C0)
3
Boot from Master Subsystem CAN interface
(2)
Boot from Master Subsystem Ethernet
4
(2)
interface
Not supported (Defaults to Boot-to-Flash),
5
(2)(4)
future boot from Cortex™-M3 USB
6
Boot-to-OTP
(2)(4)
7
Boot to Master Subsystem Flash memory
(2)(4)
8
Not supported (Defaults to Boot-to-Flash)
Boot from Master Subsystem serial
9
(4)
peripheral – SSI0 Master
Boot from Master Subsystem serial
10
(4)
peripheral – I2C0 Master
11
Not supported (Defaults to Boot-to-Flash)
(4)
Boot from Master Subsystem Ethernet
12
interface
13
Not supported (Defaults to Boot-to-Flash)
(4)
14
Not supported (Defaults to Boot-to-Flash)
(4)
15
Boot to Master Subsystem Flash memory
(4)
(1) By default, GPIO terminals are not pulled up (they are floating).
(2) Boot Modes 0–7 are pin-compatible with the F28M35x members of the Concerto family (they use same GPIO terminals).
(3) Boot Mode 12 is the same as Boot Mode 4, except it uses a different set of GPIO terminals.
(4) This Boot Mode uses a faster Flash power-up sequence. The maximum supported OSCCLK frequency for this mode is 30 MHz.
(5) Supported only in TMS version. On all other versions, this mode defaults to Boot-to-Flash.
It is advised that users should not use the unsupported boot mode configuration to let the device boot-to-
flash by default, in case TI adds new peripheral boot mode(s) in subsequent revisions of Boot ROM.
NOTE: PF2_GPIO34 is reserved to be used as one of the boot mode input GPIOs at power-up or
after reset. Users should take this into account when designing applications.
580
ROM Code and Peripheral Booting
Table 6-1. Master Subsystem Boot Mode Selection
Master Subsystem Boot Modes
Copyright © 2012–2019, Texas Instruments Incorporated
PF2_GPIO34
PF3_GPIO35
(Bmode_pin4)
(Bmode_pin3)
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
SPRUHE8E – October 2012 – Revised November 2019
www.ti.com
Table 6-1
shows the boot
PG7_GPIO47
PG3_GPIO43
(Bmode_pin2)
(Bmode_pin1)
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
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