Gpio Port A Mux 2 (Gpamux2) Register; Gpio Port A Mux 2 (Gpamux2) Register Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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C28 General-Purpose Input/Output (GPIO)

Table 4-51. GPIO Port A Multiplexing 1 (GPAMUX1) Register Field Descriptions (continued)

GPIO Port A MUX 2 (GPAMUX2) Register

The GPIO Port A MUX 2 (GPAMUX2) register is shown and described in the figure and table below.

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 4-52. GPIO Port A MUX 2 (GPAMUX2) Register Field Descriptions

If reserved configurations are selected, then the state of the pin will be undefined and the pin may be driven. These selections

are reserved for future expansion and should not be used.

General-Purpose Input/Output (GPIO)

Configure the GPIO0 pin as:

GPIO0 - General purpose I/O 0 (default) (I/O)

EPWM1A - ePWM1 output A (O)

Figure 4-43. GPIO Port A MUX 2 (GPAMUX2) Register

Configure the GPIO31 pin as:

GPIO31 - General purpose I/O 31 (default) (I/O)

EPWM9B - ePWM9 output B (O)

Configure the GPIO30 pin as:

GPIO30 (I/O) General purpose I/O 30 (default) (I/O)

EPWM9A - ePWM9 output A (O)

Configure the GPIO29 pin as:

GPIO29 (I/O) General purpose I/O 29 (default) (I/O)

SCITXDA - SCI-A transmit. (O)

Configure the GPIO28 pin as:

GPIO28 (I/O) General purpose I/O 28 (default) (I/O)

SCIRXDA - SCI-A receive (I)

Configure the GPIO27 pin as:

GPIO27 - General purpose I/O 27 (default) (I/O)

ECAP4 - eCAP4 (I/O)

EQEP2S - eQEP2 strobe (I/O)

SPRUHE8E – October 2012 – Revised November 2019

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