Parallel Gpio Mode - Host Transfer Flow - Texas Instruments Concerto F28M36 Series Technical Reference Manual

C-Boot ROM Description
Load GPIO[9,8,5:0] with data
Figure 6-31 shows the flow used to read a single word of data from the parallel port.
• 8-bit data stream
The 8-bit routine, shown in
treats the lower 8 bits masked with GPIO9 in bit position 7 and GPIO8 in bit position 6 as the the least
significant byte (LSB) of the word to be fetched. The routine will then perform a second read to fetch
the most significant byte (MSB). The routine will then perform a second read to fetch the most
significant byte (MSB). It then combines the MSB and LSB into a single 16-bit value to be passed back
to the calling routine.
656
ROM Code and Peripheral Booting
Figure 6-30. Parallel GPIO Mode - Host Transfer Flow
Start transfer
No
Device ready
(GPIO26=0)
?
Yes
Signal that data
is ready
(AIO12=0)
Figure 6-31, discards the upper 8 bits of the first read from the port and
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No
Device ack
(GPIO26=1)
?
Yes
Acknowledge device
(GPIO27=1)
More Yes
data
?
No
End transfer
SPRUHE8E – October 2012 – Revised November 2019
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