Gpio Port E Mux 1 (Gpemux1) Register; Gpio Port E Mux 1 (Gpemux1) Register Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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Table 4-58. GPIO Port D MUX 2 (GPDMUX2) Register Field Descriptions (continued)
Bit Field
9-8 GPIO116
7-6 GPIO115
5-4 GPIO114
3-2 GPIO113
1-0 GPIO112
4.2.7.9

GPIO Port E MUX 1 (GPEMUX1) Register

The GPIO Port E MUX 1 (GPEMUX1) register is shown and described in the figure and table below.
31
15 14 13 12
GPIO135 GPIO134
R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 4-59. GPIO Port E MUX 1 (GPEMUX1) Register Field Descriptions
Bit Field
31-16 Reserved
15-14 GPIO135
SPRUHE8E – October 2012 – Revised November 2019
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Value Description
Configure this pin as:
00 GPIO 116 - general purpose I/O 116 GPIO (default)
01 Reserved
10 Reserved
11 Reserved
Configure this pin as:
00 GPIO 115 - general purpose I/O 115 GPIO (default)
01 Reserved
10 Reserved
11 Reserved
Configure this pin as:
00 GPIO 114 - general purpose I/O 114 GPIO (default)
01 Reserved
10 Reserved
11 Reserved
Configure this pin as:
00 GPIO 113 - general purpose I/O 113 GPIO (default)
01 Reserved
10 EQEP2S
11 EQEP3B
Configure this pin as:
00 GPIO 112 - general purpose I/O 112 GPIO (default)
01 Reserved
10 EQEP2I
11 EQEP3A
Figure 4-50. GPIO Port E MUX 1 (GPEMUX1) Register
11 10 9
GPIO133 GPIO132
R/W-0 R/W-0
Value Description
Reserved
Configure this pin as:
00 GPIO 135 - general purpose I/O 135 GPIO (default)
01 EPWM12B
10 Reserved
11 Reserved
Copyright © 2012–2019, Texas Instruments Incorporated
C28 General-Purpose Input/Output (GPIO)
Reserved
R-0
8 7 6 5
GPIO131 GPIO130
R/W-0 R/W-0
General-Purpose Input/Output (GPIO)
4 3 2 1
GPIO129 GPIO128
R/W-0 R/W-0
16
0
419