Ctom Ipc Messages - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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6.6.12 C-Boot ROM CTOM IPC Messages
This section explains IPC Messages that will be sent by C-Boot ROM to the master subsystem
application. It is up to the application to either handle this IPC commands or ignore these IPC commands
from the control subsystem boot ROM. M-Boot ROM ignores these IPC commands from C-Boot ROM.
C-Boot ROM sends IPC messages to the master subsystem to inform of error events that occur
asynchronously in the control subsystem.
6.6.12.1 Procedure Followed by C-Boot ROM to Send CTOM IPC Messages
Below is the procedure followed by C-Boot ROM to send IPC messages to Master.
1. CTOMIPCCOM = as described in
2. CTOMIPCFLG[0] = CTOMIPCFLG[31] = 1; this will trigger CTOMIPCINT1 on the master subsystem, if
interrupts are enabled. C-BootROM will not wait for the master subsystem to clear/acknowledge the
IPCflags, but the master subsystem software must acknowledge the IPC flags in order to receive next
event successfully.
If C-Boot ROM detects that the CTOMIPCFLG bits are not cleared from prev. message it will not send the
current IPC message and simply ignore the status.
6.6.12.2 CTOMIPC Messages Table
C-Boot ROM uses CTOMIPC registers to inform the master subsystem if there was an ITRAP exception
or if there was a spurious PIE interrupt or if there was a PIE vector address mismatch exception. The
events that trigger C-Boot ROM to send these IPC Messages are explained in
21.
In this table, the Value column gives the actual data written to CTOMIPCCOM register for the respective
IPC message listed in CTOMIPCCOM column. The contents on CTOMIPCADDR, CTOMIPCDATAW and
CTOMIPCDATAR columns show the respective register contents when C-Boot ROM is sending the
respective message to the master. It is up to the master subsystem application to use these values.
Value
0 CONTROL_IPC_CTOM_COMMAND_IGNORE
0xFFFFFFFE CONTROL_IPC_CTOM_CONTROL_SYSTEM_I
N_ITRAP
0xFFFFFFFD CONTROL_IPC_CTOM_PIE_INTERRUPT_NOT
_SUPPORTED
0xFFFFFFFC CONTROL_IPC_CTOM_CONTROL_SYSTEM_I
N_PIE_VECTOR_ADDRESS_
MISMATCH
SPRUHE8E – October 2012 – Revised November 2019
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Table 6-21.
Table 6-21. CTOM IPC Messages
CTOMIPCCOM CTOMIPCADDR
(M3 - R, B.C28X R/W) (M3 - R, B.C28X R/W)
DON'T CARE
Address where an
iTRAP occurred
DON'T CARE
DON'T CARE
Copyright © 2012–2019, Texas Instruments Incorporated
C-Boot ROM Description
Section 6.6.12
CTOMIPCDATAW CTOMIPCDATAR
(M3 - R, B.C28X R/W) (M3 – R/W, B.C28X-
R)
DON'T CARE DON'T CARE
DON'T CARE DON'T CARE
Unsupported PIE DON'T CARE
interrupt number
DON'T CARE DON'T CARE
ROM Code and Peripheral Booting
and Table 6-
Description
Invalid CTOMIPCCOM
value, when there is
no message sent –
default value
C-Boot ROM got an
iTRAP exception and
is waiting for a reset
from the master
subsystem
Tells the master
system that C-Boot
ROM received an
unsupported PIE
interrupt, and the
interrupt is
acknowledged and
ignored.
C-Boot ROM
continues its execution
after sending this IPC
message
Tells the master
system that C-Boot
ROM detected PIE
vector address
mismatch.
C-Boot ROM is
waiting for a reset
from the master
subsystem, when this
even occurs
635