Transfer Count Register (Transfer_Count); Source Transfer Step Size Register (Src_Transfer_Step); Transfer Count Register (Transfer_Count) Field Descriptions; Source Transfer Step Size Register (Src_Transfer_Step) Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

Register Descriptions

11.8.13 Transfer Count Register (TRANSFER_COUNT)

The transfer count register (TRANSFER_COUNT) is shown in
15
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 11-15. Transfer Count Register (TRANSFER_COUNT) Field Descriptions
Bit Field
15-0 TRANSFERCOUNT
11.8.14 Source Transfer Step Size Register (SRC_TRANSFER_STEP) — EALLOW Protected
The source transfer step size register (SRC_TRANSFER_STEP) is shown in
in Table 11-16.
Figure 11-21. Source Transfer Step Size Register (SRC_TRANSFER_STEP)
15
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 11-16. Source Transfer Step Size Register (SRC_TRANSFER_STEP) Field Descriptions
Bit Field
15-0 SRCTRANSFERSTEP
976
C28 Direct Memory Access (DMA) Module
Figure 11-20. Transfer Count Register (TRANSFER_COUNT)
TRANSFERCOUNT
Value Description
These bits specify the current transfer counter value:
0x0000 0 bursts left to transfer
0x0001 1 burst left to transfer
0x0002 2 bursts left to transfer
... ...
0xFFFF 65535 bursts left to transfer
The above values represent the state of the counter at the HALT conditions.
SRCTRANSFERSTEP
Value Description
These bits specify the source address pointer post-increment/decrement step
size after processing a burst of data:
0x0FFF Add 4095 to address
... ...
0x0002 Add 2 to address
0x0001 Add 1 to address
0x0000 No address change
0xFFFF Sub 1 from address
0xFFFE Sub 2 from address
... ...
0xF000 Sub 4096 from address
Only values from -4096 to 4095 are valid.
Copyright © 2012–2019, Texas Instruments Incorporated
Figure 11-20
R/W-0
R/W-0
SPRUHE8E – October 2012 – Revised November 2019
www.ti.com
and described in Table 11-15.
0
Figure 11-21 and described
0
Submit Documentation Feedback