C28X Corrected Error Counter Register (Ccecntr); C28X Corrected Error Threshold Register (Ccetres); C28X Corrected Error Counter Register (Ccecntr) Field Descriptions; C28X Corrected Error Threshold Register (Ccetres) Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

Table of Contents

Advertisement

www.ti.com
5.2.4.8

C28x Corrected Error Counter Register (CCECNTR)

31
Reserved
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 5-72. C28x Corrected Error Counter Register (CCECNTR) Field Descriptions
Bit
Field
31-16
Reserved
15-0
CCECNTR
5.2.4.9

C28x Corrected Error Threshold Register (CCETRES)

Figure 5-64. C28x Corrected Error Threshold Register (CCETRES)
31
Reserved
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 5-73. C28x Corrected Error Threshold Register (CCETRES) Field Descriptions
Bit
Field
31-16
Reserved
15-0
CCETRES
SPRUHE8E – October 2012 – Revised November 2019
Submit Documentation Feedback
Figure 5-63. C28x Corrected Error Counter Register (CCECNTR)
R-0
Value
Description
Reserved
C28x CPU/DMA Corrected Error Counter
In case of an error that has been corrected during C28x CPU or DMA reads, this counter
increments by 1. After increment, if this counter value becomes equal to the value configured in the
CCETRES register, correctable error interrupt gets generated if it is enabled in the CCEIE register.
Note: Writing a value equal to the CCETRES generates an interrupt and sets the CCEFLG.
R-0
Value
Description
Reserved
C28x CPU/DMA Corrected Error Threshold Value
If CCECNTR = CCETRES, correctable error interrupt gets generated if it is enabled in the CCEIE
register.
Copyright © 2012–2019, Texas Instruments Incorporated
16 15
16 15
RAM Control Module Registers
CCECNTR
R/W-0
CCETRES
R/W-0
Internal Memory
0
0
525

Advertisement

Table of Contents
loading

Table of Contents