Event-Trigger Prescale Register (Etps) Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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Table 7-85. Event-Trigger Prescale Register (ETPS) Field Descriptions
Bit Field
15-14 SOCBCNT
13-12 SOCBPRD
11-10 SOCACNT
9-8 SOCAPRD
7-6 Reserved
5 SOCPSSEL
4 INTPSSEL
3-2 INTCNT
SPRUHE8E – October 2012 – Revised November 2019
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Value Description
ePWM ADC Start-of-Conversion B Event (EPWMxSOCB) Counter Register
These bits indicate how many selected ETSEL[SOCBSEL] events have occurred:
00 No events have occurred.
01 1 event has occurred.
10 2 events have occurred.
11 3 events have occurred.
ePWM ADC Start-of-Conversion B Event (EPWMxSOCB) Period Select
These bits determine how many selected ETSEL[SOCBSEL] events need to occur before an
EPWMxSOCB pulse is generated. To be generated, the pulse must be enabled (ETSEL[SOCBEN]
= 1). The SOCB pulse will be generated even if the status flag is set from a previous start of
conversion (ETFLG[SOCB] = 1). Once the SOCB pulse is generated, the ETPS[SOCBCNT] bits will
automatically be cleared.
00 Disable the SOCB event counter. No EPWMxSOCB pulse will be generated
01 Generate the EPWMxSOCB pulse on the first event: ETPS[SOCBCNT] = 0,1
10 Generate the EPWMxSOCB pulse on the second event: ETPS[SOCBCNT] = 1,0
11 Generate the EPWMxSOCB pulse on the third event: ETPS[SOCBCNT] = 1,1
ePWM ADC Start-of-Conversion A Event (EPWMxSOCA) Counter Register
These bits indicate how many selected ETSEL[SOCASEL] events have occurred:
00 No events have occurred.
01 1 event has occurred.
10 2 events have occurred.
11 3 events have occurred.
ePWM ADC Start-of-Conversion A Event (EPWMxSOCA) Period Select
These bits determine how many selected ETSEL[SOCASEL] events need to occur before an
EPWMxSOCA pulse is generated. To be generated, the pulse must be enabled (ETSEL[SOCAEN]
= 1). The SOCA pulse will be generated even if the status flag is set from a previous start of
conversion (ETFLG[SOCA] = 1). Once the SOCA pulse is generated, the ETPS[SOCACNT] bits will
automatically be cleared.
00 Disable the SOCA event counter. No EPWMxSOCA pulse will be generated
01 Generate the EPWMxSOCA pulse on the first event: ETPS[SOCACNT] = 0,1
10 Generate the EPWMxSOCA pulse on the second event: ETPS[SOCACNT] = 1,0
11 Generate the EPWMxSOCA pulse on the third event: ETPS[SOCACNT] = 1,1
Reserved
EPWMxSOC A/B Pre-Scale Selection Bits
0 Selects ETPS [SOCACNT/SOCBCNT] and [SOCAPRD/SOCBPRD] registers to determine
frequency of events (interrupt once every 0-3 events).
1 Selects ETSOCPS [SOCACNT2/SOCBCNT2] and [SOCAPRD2/SOCBPRD2] registers to
determine frequency of events (interrupt once every 0-15 events).
EPWMxINTn Pre-Scale Selection Bits
0 Selects ETPS [INTCNT, and INTPRD] registers to determine frequency of events (interrupt once
every 0-3 events).
1 Selects ETINTPS [ INTCNT2, and INTPRD2 ] registers to determine frequency of events (interrupt
once every 0-15 events).
ePWM Interrupt Event (EPWMx_INT) Counter Register
These bits indicate how many selected ETSEL[INTSEL] events have occurred. These bits are
automatically cleared when an interrupt pulse is generated. If interrupts are disabled, ETSEL[INT] =
0 or the interrupt flag is set, ETFLG[INT] = 1, the counter will stop counting events when it reaches
the period value ETPS[INTCNT] = ETPS[INTPRD].
00 No events have occurred.
01 1 event has occurred.
10 2 events have occurred.
11 3 events have occurred.
Copyright © 2012–2019, Texas Instruments Incorporated
C28 Enhanced Pulse Width Modulator (ePWM) Module
Registers
819